Hello,
after spending many hours on the issue, I decided to get out of my lurker vest…
I’m having trouble with a Samsung s3c2450, a CPU with an arm926ejs core, which refuses to reset halt. OpenOCD version is 0.2.0 svn 2555 running on ubuntu, connected to an Amonteg JTAGKey Tiny - no RTCK, but JTAG clock has been set slow enough.
Simply put, I have to halt the core just out of reset, since an internal ROM code is possibly preventing correct operation over JTAG - at least, I suppose: the halt command used to work fine before the external boot device (a NAND) was correctly programmed, and it still works fine on a “clean” target…
Now, halt just times out and trying to reset halt produces the following:
JTAG tap: s3c2450.cpu tap/device found: 0x07926f0f (mfg: 0x787, part: 0x7926, ver: 0x0)
JTAG Tap/device matched
WARNING: unknown debug reason: 0x0
invalid mode value encountered 20
cpsr contains invalid mode value - communication failure
Runtime error, file "embedded:startup.tcl", line 222:
expected return code but got 'TARGET: s3c2450.cpu - Not halted'
in procedure 'ocd_process_reset'
called at file "embedded:startup.tcl", line 204
called at file "embedded:startup.tcl", line 205
called at file "embedded:startup.tcl", line 221
Runtime error, file "command.c", line 469:
While I’m still waiting from Samsung any detailed documentation about any “special” issue with JTAG on their device (especially on SRST/TRST relationship), I’m wondering if anyone out there has got stuck with a similar problem before - and if and how it was fixed!
Any further info on request - don’t want to clobber the list!
BR
Stefano