When an LPC2xxx boots without valid user code, the ISP code configures the RC clock & PLL to operate at 14.768MHz. I’d like to have my OpenOCD scripts set the PLL to run at 60Mhz with my external crystal.
The first thing I do is set jtag_khz to 500, so it will run at the 4MHz RC clock speed.
Then I disconnect and disable the PLL with these commands:
mww 0xe01fc080 0
mww 0xe01fc08c 0xaa
mww 0xe01fc08c 0x55
As soon as I do that, I start getting the following messages repeated over and over:
invalid mode value encountered 0
cpsr contains invalid mode value - communication failure
Does anyone know the proper sequence of commands to stop the PLL without screwing up the jtag connection?
I’m using the Olimex ARM-USB-OCD interface on a LPC2368.