I’ve finally finished translating a circuit into a schematic in Eagle PCB, just wondering if someone can check it over and see if anyone can see any obvious mistakes.
The error message you are getting can be ignored, although you should just have one ground signal. What’s happening here is that you are connecting a signal named ‘GND4’ and a separate signal named "GND’ to the GND pin on the controller. This is not an issue, just one of Eagle’s peculiarities.
These can also be ignored:
WARNING: Sheet 1/1: POWER Pin IC1 VCC connected to +5V
Just means that you are not using the Vcc schematic supply symbol. Not an issue.
WARNING: Sheet 1/1: POWER Pin IC1 AGND connected to GND4
Eagle is expecting a signal named ‘AGND’ here, not ‘GND4’. That is the only reason for the warning. This may be an issue with the on-board ADC, but without looking at the data sheet, I cannot be sure. Some ADCs want separate analog and digital ground planes, but Atmel may not. But then I’m not sure if ‘GND4’ is your separate analog ground plane or not. It helps to label signals clearly.
These warnings relate to the way you’ve shown the AVR ISP and NES lines:
WARNING: Only 1 Pin on net N$6
WARNING: Only 1 Pin on net N$10
WARNING: Only 1 Pin on net N$11
WARNING: Only 1 Pin on net N$12
WARNING: Only 1 Pin on net N$13
WARNING: Only 1 Pin on net N$14
Eagle is pitching a fit because they are not connected to any other pin or net. These will not show up as yellow signal wires in the PCB editor and you will not be able to use the auto router to route these. Not only that, but you’ll have a very hard time hand routing them. You really need to connect these to a part of some sort in the schematic editor.
WARNING: Sheet 1/1, Net GND4: wire overlaps pin at (1.5 0.7)
All this means is that you connected the net ‘GND4’ to a pin, but then continued to draw the net over and past the pin, connecting it to nothing. Basically, you have a stray line (probably no more than .1" long) somewhere. Its very hard to see this in Eagle, so you’ll need to use the coordinates provided to find this and fix it. As long as this stray net does not connect to anything else, you’ll be fine, although I’d still correct this.
This is my first schematic using eagle so i’m still struggling to work some bits out
I’ll go correct the errors and then report back with an updated schematic…
As far as the pins that are not connected to anything ie; latch, data etc…
is the best way to go to create a custom part within eagle that has these connections on it? This way when i use the autorout function it will include these in the board?
Redone the schematic so now the only warnings that remain are
WARNING: Sheet 1/1: POWER Pin IC1 VCC connected to +5V
WARNING: Sheet 1/1: POWER Pin IC1 AGND connected to GND
The first warning I am ingnoring as that is just a labeling issue and the 2nd warning shouldn’t be an issue as the original circuit I am using doesnt use a seperate ground plane
On the issue of the LED being the wrong way round, how come the eagle ERC doesn’t pick this fault up??
first, you need to look at every single ERC error and warning. Ignore them at your own peril. I’ve heard of experience designers screwing themselves that way. Look very carefully at each warning. I made a board once where I connected a PIC’s Vss (microchip term for GND) to +5V. I saw the ERC warning but looked right through it thinking it was Vdd. That was a fun one!
GND - use the same symbol for all ground connections. It looks like you used earth for one and gnd for the other. just use one symbol type unless you really mean it. eagle sees the text name of the symbol. from looking at your design I think you meant to only have one ground.
Separate analog and digital grounds are often used to provide superior noise isolation. sometimes AGND and GND are connected via a ferrite bead. Given the simplicity of your design, I don’t think you care at this point.
You will get the Vcc error because there are a number of different conventions for the name of a chip’s +V supply pin(s) (Vcc, Vdd, +V, +5V…). It’s just telling you that you need to be sure. Note, you could edit the library part and change the pin name if you cared but I don’t recommend that.
the unconnected pins each need to be looked at to make sure you meant them to be unconnected. Nothing wrong with it.
the “overlaps pin” message is something you need to fix. It means there is not a connection. either you meant to connect it and drew the line too far or accidentally drew an unrelated wire too close to a pin. Either way, delete the wire and start again. also, don’t change your schematic grid from .1" - you will never hook things up.
edit: we crossed in postings - you’ve made progress. eagle won’t pick up the LED error because it doesn’t know what you are doing with the part. It can understand power but not signals.
As you can see, instead of having the VCC, Clock, Latch and Data pins connected to nothing, i have added some 10pin headers to the board (Overkill I know but it’s all my local electronics shop had in stock)
As far as I can tell this schematic is complete and should work fine the only thing I envisage problems with is the LED being connected the wrong way round, but as long as I solder it in the other way round during construction i shouldn’t have a problem, or should i?
Now I just need to route the board and in the autorouter, another thing I wanted to know, when I try and autoroute the project the pads all have large drill holes in them, is there a way to make them solid so when I drill them out it won’t take the pad with it?](ImageShack - Best place for all of your image hosting and image sharing needs)
Not that i’m doubting you But could someone please explain why AREF needs a 100n cap connected to ground? Is it something that pin needs at all times when using an Atmega8 or is it the way I have designed the schematic that requires its usage?
The LED is an easy fix, i’ll swap that around so it should light, the ISP should also be easy to fix, missed the reset pin
And another thing that’s confusing me is the 100n cap that is connected to both +5v and to GND - The original circuit I am working from informs me that I need to have this in place and that it needs to be near the atemga8, but I cant work out what it’s purpose within the circuit is going to be…
Each supply pin should have a decoupling capacitor.
The data sheet specifies that AREF should have a capacitor on it to reduce noise. The AVcc pin should be decoupled with an inductor and capacitor, and careful layout is needed. Details should be in the data sheet. You don’t need them if you are not using the ADC, of course.
The purpose of this circuit is to decode the output of a shift register to a USB connector, with this in mind i’m assuming the shift register is doing all of the analog to digital conversion so I shouldn’t need to use it on the Atmega8?
Please correct me if i’m wrong (which i probably am!)
If I am not using the ADC does that mean that each supply pin doesn’t need a decoupling capacitor?
no, the SR isn’t doing anything analog. In fact, your design doesn’t appear to be doing anything analog - full speed ahead.
The reasons for the caps and inductor on the analog supply and ref pins is to decrease the noise that the analog section will see. If you don’t pay attention to this when you are using ADC or other analog inputs, you will see a lot of variation in the values you read off the ADC, even from supposedly stable input values. This can be quite high - >4 LSBs at times. Something to think about when doing your next design… I like to add those components when doing a design, even if the intent is completely digital. You can always leave them off the board. I have a habit of recycling my designs and thus it becomes easier to add in analog.
