Who has what xscale based SBC working with OpenOCD?

Development Boards MicroMod
1

I am looking for an Xscale (or other ARM) based SBC supported by OpenOCD to then allow Eclipse IDE source based debugging of bootloader.

SBC Needs to have open source Linux available and at least LCD. Ethernet, and USB interfaces. So at least 8mb+ Flash and 16mb+ of RAM for Linux.

Anybody have this or know of it? I can’t find it!

Doesn’t yet look like any of the SBCs script .cfg files in current Openocd release has Flash and RAM BIG enough to support LCD Linux. Xscale is mentioned but perhaps really still in the debug works as no .cfg for xscale are in the latest release bin/scripts directory?

FYI I have a phytec phycore pxa270 with pengutronix open source uboot and linux but it appears now that the jtag interface may not support usb-jtag-openocd?

2

Have some new hope now, still not a success but at least I can communicate to a phytec-pxa207 using amontec jtagkey-tiny

with the .cfg script below. Key past prior communication error was having the reset delays high enough. In the case of the amontec jtagkey the jtag-speed can apparently a fiull speed 0 with others interfaces maybe 1 to 10?

So now the things I have going wrong at first I see

error:fileio.c:79 fileio_open_local : couldn’t open xscale/debug_handler.bin

(what is this? -appears non-fatal?

Then I am stuck with …

user: target.c:435 target_process_reset<> Timed out waiting for halt after reset

atfer which the command prompt window hangs.

-------- my script

telnet_port 3333

gdb_port 4444

interface ft2232

ft2232_layout jtagkey

ft2232_device_desc “Amontec JTAGkey A”

ft2232_vid_pid 0x0403 0xCff8

jtag_speed 0

jtag_nsrst_delay 250

jtag_ntrst_delay 250

reset_config trst_and_srst separate

jtag_device 7 0x1 0x7f 0x7e

daemon_startup reset

target xscale little reset_halt 0 pxa27x

working_area 0 0x5c000000 0x10000 nobackup

run_and_halt_time 0 30

target_script 0 reset c:\Program Files\openocd-r657\bin\pxa270flash.ocd

flash bank cfi 0×00000000 0×1000000 2 4 0

–I also am using a pxa270flash.ocd like this

–I stole from somebody else so likely it’s not really right either.

wait_halt

armv4_5 core_state arm

flash write 0 uboot.bin 0x0

mww 0xfffffd08 0xa5000401

reset

shutdown

3

It was communicating with .cfg given here in prior messge and then it just quit working I didn’t change anything as far as I know but it’s back to no communication with mistmatched jtag chain values.

Hmmmmmm… so weird state thing going on somehow here?

Just got done trying everything I could think of and it’s still not working.

So good news is I think it can work BUT just how to make it work is

still in big question. Oh well more tomorrow.

4

I went away for maybe 4 hours with everything turned off and come back

and run the same .bat file (on windows) to do the openocd command and

magic it communicates OK again. Seems perhaps a capacitor needs to

lose a charge or something. Well good news at least closer to something

that works correctly.

5

We’re also using the Phytec board and looking for good tools. We are using WinCE 5.0 and do most of our work in Platform builder, embedded C++, or Visual Studio. I’m told the PXA270 has been a problem with many emulators because of the timing of the power up sequence.

The Phytec Carrier board has a GoldCap on it which can power the system for several hours. When you wait, the Cap discharges so that reset works properly.

If you are interested in other Phytec issues just post here.

:lol:

6

Anyone use ARCOM ZEUS pxa270 SBC board? I tried the same script RonWhites post, but give errors like:

Info: jtag.c:1389 jtag_examine_chain(): JTAG device found: 0x59604093 (Manufacturer: 0x049, Part: 0x9604, Version: 0x5)

Error: jtag.c:1399 jtag_examine_chain(): number of discovered devices in JTAG chain (3) doesn’t match configuration (0)

How to find the jjtag_device string for each board or each SOC?

Thanks,

Yi