I have designed a very basic board for testing my chip. I dont have any schematics for this. It is simple board having
the footprint of my IC,
Banana plug holes for power supply, 2 caps for decoupling the power supply
Pin headers for connecting external pins
3 potentiometers for biasing.
11 SMA connectors for high frequency signals.
I have some doubts:
I am getting a DRC error named as “Dimension” near the edge of the SMA connector. I am unable to figure out what this exactly means. If i disable the Copper/Dimension check in the DRC under the Distance tab, this error goes off.
The second DRC error I am getting is “Stop mask” at places where solder mask overlaps the dimension layer. Again disabling the above option sets this right.
My frame has some characters 1,2,3 etc… Will these layer(Dimension) be a part of the manufactured board…
I have changed the edge of the board. Previously I used the frame command to draw the outline. Now I used the wire command and choose the Dimension layer for it.
I have changed the grid, however as one may guess, I am getting the off grid DRC error. How should I go about this? Should I delete all the traces and replace( almost like redoing the entire stuff). I tried moving the parts but I could not select some of the parts after I run the MOVE command, for ex I could not select my main IC under the move command.
I have rerouted the VDD trace with a width of 0.024 inches. Is it good enough. I have a current consumption of arnd 9mA from my digital VDD. Is it necessary even to increase the gnd trace width?
If you are getting this made, other than the suggestions above, regarding trace/via size and ground plane, you should work on your silkscreen. You have unnamed parts, and names that are on top of pads.
Use the smash tool to break the names away from the part, so you can place the names on the board where they make the most sense.
What is a ground plane and how do i make it…I tried to search thru the forums and I understood that we need to draw a polygon connected to gnd. However, I am not very sure. Could you please help me with it…
I also noticed in one of the topics that there shouldnt be traces below a IC as it may short to gnd… Is the gnd plane have something to do with this?
Use copper pour instead of a ground plane, ground planes are usually used on multi-layer boards and are layers consisting entirely of copper (usually with no tracks). Grounded copper pour on the top and bottom of the board will help with stability and noise reduction. I think it’s done with a polygon in Eagle, as you say.
There’s nothing wrong with putting tracks under an IC.
I don’t know the difference between a ground plane and a simple copper pour. Are you saying, pour copper, but don’t associate it with ground?
Anyway, to do this in Eagle:
Select the polygon tool. Change the layer to the layer you want to create the copper pour (either top or bottom). Change the isolate value at the top to something larger than default. I use 16mil, but use whatever you are comfortable with. Draw the polygon around the entire dimensions of the board and connect it to itself to complete it.
If you are not associating this with ground, then just hit ratsnest now and your layer will fill.
If you want to associate this with ground:
Select the NAME tool and select the edge of your polygon. Name it the same as your ground layer (GND, VSS, …). Hit the ratsnest button and it should fill in the ground signal and fill in the board, living your other signals isolated.
Repeat for the other side of the board to do both sides.
If you google, you can find some tutorials on this, but the ones I found were more complex than they needed to be, or just old.
leon_heller:
Use copper pour instead of a ground plane, ground planes are usually used on multi-layer boards and are layers consisting entirely of copper (usually with no tracks).
Actually, I see the difference between Leon's definition of a ground plane and a pour right in his message. I just didn't read it carefully enough.
I’m in the middle of my very first Eagle project. I’ve tried a couple times over the years to learn eagle, and these type of things have always driven me nuts and cause me to give up on it. I’ve run the autorouter and it gives me two clearance errors, this is one of them:
This is one pin of a 2x4 row connector out of the con-lstb library. Where the hell does the layer 1 “stuff” come from that is on the edge of this pad? If I move both the track and the part, it stays there. And I can’t select it or anything (this is what frustrates me to no end with eagle).
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Without seeing what’s happening, my only advice is, don’t use the autorouter.
Yeah, I probably should have done this board by hand as there aren’t a lot of traces. However, any other ideas for getting rid of this “debris” (as another user of another forum named it and got no good replies on what it was or how to fix it) other than just starting from scratch again. Have a look at the pic if you can. It’s really mind numbing wtf it is, why I can’t select it, etc.
Yeah, I assumed that is what it was, however ripping the trace up and moving it leaves the leftover red trace on the edge of the via and re-running DRC flags the spot as an error regardless of a trace being there or not. I’m ignoring it for now, I may come back to it if I get interested enough to figure out if it is a library part issue or some other bizarro thing going on.
