DRC error, 0.008" trace smaller than 0.0081000002

Hello

I have submitted to support team, but has anyone else found this?

I submitted design (8mils) and DRC failed. In the report, it gives, for the bottom copper layer:

DRC Error - trace to narrow (0.0080000000 < 0.0081000002)

*** previous line repeated 201 more times ***

The DRC does not like my traces width being exactly 8 mils.

Note that I validated my design in both PCB editor and gerber editor and it passed.

Regards,

Eric

Yep, I’m seeing that error today too. I submitted gerbers that I created back in 2008 for a design that passed DRC back then with 8 mil traces again today. It failed with the same error message you’re seeing. I rebuilt the Gerbers from the PCB design files thinking maybe the gerbers suffered from some bit rot over the past four years and tried again. Same error message again.

-Glen

Getting the same issue.

I’m verifying with the drc rule checker and using the cam job from this Sparkfun tutorial: http://www.sparkfun.com/tutorials/115. Seems like a floating point issue.

EDIT: Trace width is set to 10mil (default autoroute), and I’ve tried with both 8mil and 9mil spacing, to no avail.

Any idea when this issue might get resolved? Parts of my board are fairly tight, so I’d rather not widen all of my traces to 10mil if I can avoid it…

I had the same problem. If you whine to support@batchpcb.com they can manually pass your design, but since we’re 2+ months into the new web site and the most basic bugs haven’t been fixed, I wouldn’t hold my breath. I’m really amazed at how stubborn they’ve been about not fixing the new, improved, more maintainable code.

I’m having this problem too. Finally solved it but it was not as easy as you might think. First I had to make 137 traces slightly wider. I was lucky it was only about 5% of my total traces. But I still kept getting the error even tho it passed my DRC which had the minimum trace size to be 10 mil. Turns out in addition to traces, it’s checking the size of your dimension layer lines. Some of mine were 0 width or 8mils just to establish size of board. Took me a while to figure out which “wires” were undersized. Never had a problem with that before. Hope they fix this soon.

Ok, good (well, I should say not good…) At least I’m not the only one!

I submitted an e-mail request and the support “team” manually approved the design the same day I had DRC error and I posted this thread :slight_smile:

Yes, it looks like a coding error. It may be something as simple as

  • Allow some room, like +0.1 mil, so to avoid DRC error with Gerber rounding.

but the software line should have read -0.1 mil instead of +0.1 mil above… :roll:

I say this because, if you forget the 0.0000000002" (most likely due to floating point precision), then you’re exactly 0.1 mil off. This really looks like a “plus instead of minus” code bug :!:

+1 on the Dimension size issue. Soon as I changed it from 8mil to 10mil, everything was peachy. Eagle DRC doesn’t check dimension width. Some testing would be needed but for those having issues, perhaps just change the mil size from 8 to 8.2? I’m thinking that should clear it up without messing up the board that much and needing to email BatchPCB. Kind of sucks but it can be a fix till they correct this issue.

something else is going on. I too was having this error. Being a novice at this, i figured I’d submit a simple design. 2 holes and 2 traces plenty of room… same error. I submitted to the support team. let’s see

Same issue w/ me…used Sparkfun’s CAM file and no DRC errors.

BatchPCB rejects it w/ exactly this error. I’d rather not bump my trace size either…seems like a solid bug on their end…

WOW, well, submitted my orginal design, only one change, change board outline to 9 mil vs the FreePCB default of 5. design passed.

Does anyone know if there are any plans to get this bug fixed? It’s a bit of a pain to work around all the time.

Ditto here - just going to wait until they either say traces must be no less than 0.0081000002" or fix the DRC bot to mean what they say (.0080000000). Really - just make it 0.0079. I’m pretty sure the PCBs would still turn out JUST FINE.

Agh! More wasted man-hours!

I changed all text/silk lines from 8 to 8.2.

I changed all traces from 12 to 11 - on the theory that edges of fills 20 mils away create exactly 8 mil spaces.

All I got for my repeated efforts was another chuckle…

DRC Error - trace to narrow (0.0080000000 < 0.0081000002)

*** previous line repeated 77 more times ***

Grammar - to bad it tends to be indicative. :wink:

Maybe some time next year you guys will realize that THEY ARE NOT GOING TO FIX IT! Damn… Just go somewhere else.

The DRC Bot is clearly broken. I just ran the following test on a 4 layer board. I placed 2 vias and 4 lines on the board. The vias were 13 mil drill and 4 mil annular ring. The lines were 6 mil. The board failed.

I repeated with 12 mil lines. The board passed.

I repeated with 8 mil lines. The board failed.

I repeated with 8.5 mil lines. The board passed.

There are two problems with the DRC BOT. The first is that it is not set up with the proper rules for 4 layer boards. The FAQ’s clearly state that 4 layer boards require a minimum 6 mil lines and spaces, not 8 mil.

The second problem is that there is a math error. The BOT will NOT pass lines that are at the spec minimum. I did not test spaces.

PLEASE FIX THIS. PLEASE FIX THIS. PLEASE FIX THIS.