Hello,
I’m using an openjtag probe with openocd1.0 and an arm926EJ-S. I have problems to perform correct reset halt in gdb. I expect that after a reset halt function all registers including PC be at 0x0 but PC is at random value after reset halt function. So it seems reset halt function don’t work … Anyway I can load a code to to the sdram set pc at 0x0 and execute correctly software. but it seems that arm already execute some instruction after reset and I don’t want it.
I don’t know if it is linked with my previous problem but when gdb is attach to the arm I can perform a complete system reset (including ARM reset). TRST is not modified so JTAG connection is always on during the system reset. And after the system reset registers values are always at previous value (even “monitor reg” give non null registers for pc). Is it normal because of the jtag connection that internal registers of ARM926 are not reseted ?
is anyone can help me ?
