Silkscreen thoughts

  1. I guess that silkscreen lines can be .008 or larger. I hope that that smaller lines are simply not necessarily going to render properly, and would not cause a board rejection.

  2. I might want to leave some .001 silkscreen lines, that help me during my planning, in place. I expect that they may or may not show up on the board. Is that OK?

  3. Is there a problem with running silk screen images right up to the board edge? I would not have a problem with the image area within .010 of the board edge not being rendering right.

  4. I understand that silkscreen images are permitted over vias, and that the image will be affected naturally. Silkscreen images over pads should not be there.

  5. http://batchpcb.com/index.php/Faq#How%2 … my%20board says

The “outline layer, or a silkscreen layer” can be used to describe the shape of a board. I expect to use an outline layer. If I used a silk screen for the purpose, I guess I would put a top silkscreen rectangle on my rectangular board with a line width of 0.001 inch. This might give an ambiguity of board size of about 1 mil. I expect that using the outline layer will be the best way, but I could do both if it helps somehow.

Comments on any of these or, or other thoughts on silkscreens on boards, would be appreciated.

Analogon:

1 - In my experience, that is correct. Smaller lines just won’t appear. They may be removed entirely by the fab though, so its at your risk.

2 - Should be fine, they definitely won’t show though

3 - It’ll probably be fine, the silkscreen is printed before they cut the boards apart

4 - Silkscreen images not over pads is your responsibility - some fabs will fix that for you, others won’t! I’d check this carefully.

5 - Outline routing is typically a low tolerance cut anyways - probably ±5 mil or worse. I wouldn’t worry about the width of the line.

–David Carne

  1. I’ve used silkscreen lines less than 8mil with no problems. In Eagle, I use text at .07 and 8%, which equates to about 5mil text lines and they show up fine. The silkscreen layer is not checked by the DRC bot.

  2. Most likely they won’t show up, but I have no personal experience. In the chance that they do, make sure they are appropriate and won’t cause confusion.

  3. Some of my parts have silkscreen that hangs off the board defined by my outline layer. It appears that BatchPCB charged me for the overhang, but routed to my outline layer. Therefore, the silkscreen runs right to the board edge. It has no distortion.

  4. If you use the SparkFun DRC rules in Eagle, they cover vias with solder mask. This allows the silkscreen to look almost normal over vias. If you do not have solder mask and try to put silkscreen over them, it will not stick. You are welcome to put silkscreen over pads, but it will not show up.

  5. SparkFun CAM job puts the outline layer on TOP COPPER layer. The DRC bot doesn’t seem to yell about the fact that it’s a 0mil line. I believe routing is done to the INSIDE of this line, to avoid leaving copper on the board edge. My 2.5" board measured just slightly less than 2.5" (maybe 1 or 2 mil tops).